Image sensor arrays typically comprise a linear array of photosensors which raster scan an image bearing document and convert the microscopic image areas viewed by each photosensor to image signal charges. Following an integration period, the image signal charges are amplified and transferred as an analog video signal to a common output line or bus through successively actuated multiplexing transistors.
For high-performance image sensor arrays, one possible design includes an array of photosensors of a width comparable to the width of a page being scanned, to permit one-to-one imaging generally without the use of reductive optics. In order to provide such a “full-width” array, however, relatively large silicon structures must be used to define the large number of photosensors. One technique to create such a large array is to make the array out of several butted silicon chips. In one proposed design, an array is intended to be made of 20 silicon chips, butted end-to-end, each chip having active photosensors spaced at 400 or more photosensors per inch.
Further, in a full-color scanner, as would be used in color copying, there may be provided three or more linear arrays on each chip, each array filtered to receive a single primary color. As described in U.S. Pat. No. 5,519,514, each linear array on a chip may be desired to be independently controllable in some respects, particularly in terms of “integration time.” Integration time is, broadly speaking, the length a particular photosensor is exposed to light from a small area on the original image being scanned, to yield a pixel of data. In the case of a color apparatus, each of three or more primary-color photosensors will view the substantially same small area in the original image, to yield full-color image data. In various situations, the integration times associated with different-color linear arrays on a single chip may be desired to be finely adjusted.
The present disclosure addresses a system for adjusting integration times associated with different photosensor sets in different chips within a larger system.